In selecting and deselecting word lines in a memory, such as a static random access memory (SRAM), the prior art has used asymmetry in drive strength of inverters in word line selection such that greater drive strength is used in deselecting word line as compared with selecting word lines. For instance, in a scheme wherein an inverter comprising a p-channel transistor connected to an n-channel transistor is used to drive a word line, the n-channel transistor may be larger than the p-channel transistor. Thus, greater drive strength will be used in deselecting word lines. A schematic drawing of one example of this prior art scheme is illustrated in FIG. 1. FIG. 1 shows p-channel transistor 2 which is connected to n-channel transistor 4 as being half as large as n-channel transistor 4. This is indicated by the 1/2.times. next to transistor 2 and the .times. next to transistor 4. As shown, transistors 2 and 4 share a common gate as well as share common outputs which drive a word line. The source of transistor 2 is at voltage Vdd while the source of transistor 4 is at ground. One major disadvantage in using schemes with asymmetry in drive strength arises because of its insensitivity to parameter variations, such as changes in temperature, threshold voltage and etc. Also, asymmetries in drive strength result in inverters which are not designed for maximum noise margin and which will not have optimum performance in a transient dose environment.